NVIDIA Unveils Vera Rubin Architecture Roadmap: 3nm Silicon and HBM4 Pioneering Million-GPU Superclusters

On June 3, 2025, during an electric Computex 2025 keynote address in Taipei, NVIDIA CEO Jensen Huang unveiled the strategic engineering blueprint that will succeed Blackwell: the Vera Rubin architecture. Named in homage to pioneering astronomer Vera Rubin—who confirmed the existence of cosmic dark matter—this architecture commits to TSMC’s 3nm fabrication nodes, revolutionary HBM4 stacked memory, and Co-Packaged Optics (CPO), architecting the planetary standards for future million-GPU supercomputing clusters.

Vera CPU and Rubin GPU: The Next-Gen Heterogeneous Vanguard

The Vera Rubin platform integrates two custom heterogeneous compute engines designed to operate in total architectural symbiosis:

1. Vera Central Processor (Vera CPU): Succeeding the Grace CPU, Vera incorporates next-generation custom Arm Neoverse cores optimized for high-concurrency vector database retrieval (RAG), unstructured data preprocessing, and autonomous Agentic AI orchestration.
2. Rubin Graphics Processor (Rubin GPU): Fabricated on TSMC’s 3nm process line, the Rubin GPU introduces architectural acceleration for sparse Mixture-of-Experts (MoE) dispatching and autonomous self-reasoning inference pathways.
3. Pioneering Next-Generation HBM4 Memory: Rubin stands as the semiconductor industry’s flagship vehicle for HBM4 technology. Abandoning legacy 1024-bit interfaces, HBM4 adopts advanced TSMC base logic dies to double the bus width to 2048-bit, unlocking memory bandwidth figures exceeding 12 TB/s.

Sixth-Generation NVLink and the Silicon Photonics Revolution

To interconnect hundreds of thousands of GPUs without running into the physical thermal and impedance ceilings of conventional copper cabling, Rubin initiates the transition into Co-Packaged Optics (CPO) and silicon photonics:

• Sixth-Generation NVLink: Chip-to-chip bandwidth escalates to a staggering 3,600 GB/s (3.6 TB/s)—over 20x the throughput of original Pascal-era NVLink.
• On-Substrate Silicon Photonics: Laser optical transceivers mounted directly onto multi-chip packaging transmit optical signals across fiber cables, linking multi-building datacenter arrays with microsecond latencies and radically lower thermal dissipation.

Historical Perspective: Transitioning Computing from Copper to Light

The unveiling of the Vera Rubin roadmap at Computex 2025 broadcast that high-performance computing is migrating into the optical domain. By maintaining a relentless annual product cadencing rhythm, Jensen Huang shattered traditional multi-year silicon update cycles, guiding global enterprise computing directly into the era of optical-interconnect superfactories.